ASIC Digital Design, Staff Engineer (Hyderabad)

ASIC Digital Design, Staff Engineer (Hyderabad)

07 Oct
|
Synopsys
|
Hyderabad

07 Oct

Synopsys

Hyderabad

Descriptions & Requirements

Job Description and Requirements

We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
You Are:
You are a seasoned digital design professional with a passion for architecting and implementing state-of-the-art ASIC solutions. Bringing over a decade of hands-on experience in RTL design, you thrive in complex, multi-site environments and are driven by the challenge of building high-performance IP Cores for consumer and automotive applications. Your expertise spans industry protocols such as UCIe, Ethernet, PCIe, DDR, MPHY,UFS,UNIPRO and more, making you a go-to technical leader for die-to-die communication solutions.





You possess a solid foundation in HDL design flows and have mastered tools including Verilog/SystemVerilog, synthesis, CDC analysis, and static timing. Your background includes the ability to define and drive micro-architectures from functional specifications, and you excel at balancing innovation with quality-driven processes. As a mentor and collaborator, you inspire teams to achieve technical excellence, and your communication skills allow you to interface seamlessly with global colleagues and customers.

You are proactive, detail-oriented, and committed to continuous learning and improvement. Your initiative and problem-solving abilities set you apart, and you are eager to contribute to a culture of innovation at Synopsys. If you’re ready to lead challenging projects and make a tangible impact on next-generation technology, this role is tailored for you.
What You’ll Be Doing:
• Architecting and implementing high-performance RTL designs for advanced IP cores, focusing on d

📌 ASIC Digital Design, Staff Engineer (Hyderabad)
🏢 Synopsys
📍 Hyderabad

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