Company Description Tattvasemi Technologies Pvt. Ltd. is a semiconductor engineering services startup specializing in VLSI design and silicon test solutions for ASIC and SoC development. The company partners with semiconductor firms, design houses, and product startups to enable predictable tapeout and first-silicon success through robust, manufacturable test architectures.

Its team offers deep hands-on experience across the full VLSI lifecycle, from RTL planning to production test. Tattvasemi focuses on ensuring high quality, comprehensive test coverage, and schedule reliability for complex semiconductor programs.

Role Description The Design For Testability (DFT) Engineer will work on-site in Bengaluru in a full-time capacity, contributing to test architecture design and implementation for ASIC and SoC projects. Day-to-day responsibilities include developing and integrating DFT structures (such as scan, BIST, and boundary scan), collaborating with design teams to ensure testability, and analyzing fault coverage to optimize test strategies. The role involves generating test patterns, supporting silicon bring-up and production test, and troubleshooting test-related issues to improve yield and reliability.

The DFT Engineer will also document methodologies, participate in design reviews,



and coordinate with cross-functional teams to align test solutions with project goals and timelines.

Qualifications

- Candidates should possess strong skills in Design Engineering and Product Design for ASIC/SoC and related semiconductor systems.
- Candidates should possess foundational knowledge in Electrical Engineering to understand circuit behavior, test requirements, and hardware interfaces.
- Candidates should possess familiarity with Computer-Aided Design (CAD) tools used in VLSI design and layout workflows.
- Candidates should possess relevant awareness of Mechanical Engineering principles where packaging, thermal, or board-level considerations impact testability.
- Experience with DFT methodologies (scan insertion, ATPG, MBIST, JTAG), and EDA tools for test (e.g., Synopsys, Cadence, Mentor) is highly beneficial.
- A bachelor’s or master’s degree in Electronics, Electrical Engineering, VLSI, or a related field is preferred.
- Strong analytical, problem-solving, and scripting abilities (such as Python, Tcl, or Shell) for automation and data analysis are advantageous.
- Ability to collaborate in cross-functional teams, communicate clearly, and work in a quick-paced, schedule-driven environment is essential.

📌 Design For Testability Engineer (Bengaluru)
🏢 Tattvasemi Technologies
📍 Bengaluru