08 Oct
|
GK HR Consulting India Private
|
India
08 Oct
GK HR Consulting India Private
India
Key Responsibilities:
- RTL design and development for high-performance SoCs.
- Work on architecture, microarchitecture, and system-level design.
- Perform Static Timing Analysis (STA), timing closure, and constraint management.
- Handle Physical Design activities including floorplanning, placement, CTS, routing, and optimization.
- Collaborate with DFT, software, architecture, analog, and backend teams.
Required Skills:
- Verilog/System Verilog, RTL Design
- SoC Architecture & Microarchitecture
- STA, SDC, Timing Closure, MCMM Analysis
- Physical Design (Floorplanning, CTS, Routing, ECO)
- DFT, Scan, MBIST, CDC
- Prime Time or Tempus
Education: BS/MS in Electrical Engineering, Computer Science, or related field.
Nice to Have:
- Python/Ruby
- Regression systems and revision control tools
- Startup experience
📌 Digital RTL / STA / Physical Design Engineer (India)
🏢 GK HR Consulting India Private
📍 India