Hiring: FPGA Engineer – CXL / PCIe Gen6/Gen7
Location: Gurgaon, Haryana
Experience: 3–5 Years
Domain: Electronics / FPGA / High-Speed Interconnects
About the Role
We are looking for a hands-on FPGA Engineer to design, develop, integrate, and validate FPGA solutions for next-generation CXL and PCIe Gen6/Gen7 protocol test products.
You will work closely with FPGA architects, hardware, software, validation, and system teams to develop high-performance FPGA solutions and debug system-level issues.
Key Responsibilities
• Design and implement FPGA logic for CXL and PCIe Gen6/Gen7 protocol solutions.
• Translate protocol and product requirements into RTL design and implementation.
• Develop and maintain RTL using Verilog and/or VHDL.
• Work with Intel/Altera and/or AMD/Xilinx FPGA tools and design flows.
• Perform simulation, synthesis, implementation, timing analysis, and FPGA debugging.
• Collaborate with hardware/software teams for FPGA integration and platform bring-up.
• Debug protocol, FPGA, hardware, and system-level issues.
• Support validation, performance optimization,



and product qualification.
• Develop reusable and maintainable FPGA components and verification practices.
• Leverage AI/ML and GenAI-assisted engineering tools for RTL development, verification, debugging, documentation, and automation.
• Collaborate with cross-functional and global engineering teams.

Mandatory Skills
Strong understanding of CXL and PCIe specifications – Mandatory
3+ years of hands-on FPGA design & development experience
Strong RTL design experience using Verilog and/or VHDL
Positive understanding of FPGA architecture, digital design, simulation, synthesis, and timing
Experience with Intel/Altera and/or AMD/Xilinx FPGA development tools
Ability to debug FPGA designs and perform hardware/software integration
Strong problem-solving and communication skills
Preferred Skills
• Strong knowledge of CXL and/or PCIe protocols
• Experience with PCIe Gen5/Gen6/Gen7
• Experience with high-spee

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