High Performance DSP core Implementation(Synthesis) Senior Lead Engineer (Noida)

High Performance DSP core Implementation(Synthesis) Senior Lead Engineer (Noida)

08 Oct
|
Qualcomm
|
Noida

08 Oct

Qualcomm

Noida

Company:
Qualcomm India Private Limited
Job Area:
Engineering Group, Engineering Group > ASICS Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering,



or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.

Experience: 5 to 8 years of hands on experience in Synthesis and LEC

Job Role
• Should have solid understanding and in-depth knowledge of Physical Synthesis and Synthesis methodologies with leading industry standard tools.

• Experience with writing timing constraints for synthesis, STA, timing closure and pipelining at different levels for performance optimization and timing closure.

• Experience in all aspects of timing closure for multi-clock domain designs.

• Should be familiar with MCMM synthesis and optimization.

• Should have good understanding of low-power design implementation using UPF.

• Experience with scripting language such as Perl/ Python, TCL.

• Experience with different power optimization flows or technique such as clock gating.

• Should be able to work independently with design

📌 High Performance DSP core Implementation(Synthesis) Senior Lead Engineer (Noida)
🏢 Qualcomm
📍 Noida

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