Meta is seeking an ASIC Design Engineer Intern to join our Infrastructure organization. Our servers and data centers are the foundation upon which our rapidly scaling infrastructure efficiently operates and upon which our services are delivered. By holding this role, you will be an integral member of an ASIC team to build accelerators for some of our top workloads enabling our data centers to scale efficiently.

You will have an prospect to participate in design and verification of advanced IPs using state of the art tools. Come work and learn alongside our engineers to build “Green” data center accelerators. Internships are twelve (12) to sixteen (16) weeks long.

Responsibilities
Participate in Micro-architecture, Design, and Verification reviews and provide feedback
Design and develop RTL or HLS code for some of the IPs
Analyze designs and enhance PPA (Power, Performance, Area)
Support and develop Verification Infrastructure, analyze and improve Verification Coverage
Support Simulation accelerators and post-Silicon validation

Minimum Qualifications




Currently has, or is in the process of obtaining, a Bachelor's degree in Electrical Engineering, Computer Engineering or related engineering fields
Knowledge of Verilog or System Verilog or HLS
Knowledge of Computer Architecture and Logic Design fundamentals
Must obtain work authorization in the country of employment at the time of hire and maintain ongoing work authorization during employment
Intent to return to degree-program after the completion of the internship/co-op

Preferred Qualifications
Currently has, or is in the process of obtaining, a Masters or PhD degree in Electrical Engineering, Computer Engineering or related engineering fields
Experience with Lint, Synthesis, Formal or Physical Design tools
Scripting experience with Python or Perl
Experience with High Performance Computing
Experience with Digital Signal Processing Techniques
Creativity and problem solving

📌 Asic Engineer Intern, Design Bengaluru (India)
🏢 Meta
📍 India