Role Description
Who we are:
At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 30+ countries, we build for boundless impact—touching billions of lives in the process. Visit us at .
Summary
UST is looking for a Senior SoC/FPGA Verification Engineer with strong expertise in C/C++ based pre-silicon verification, embedded processor validation, and UVM-based verification methodologies.
The Chance
We are seeking an experienced Verification Engineer to drive pre-silicon verification of complex FPGA and SoC platforms. This role requires deep expertise in software-driven verification, embedded processor validation, and verification framework development. The ideal candidate will work closely with architecture, RTL, firmware, and validation teams to ensure robust system functionality and first-pass silicon success.
Key Responsibilities
• Develop and execute comprehensive verification strategies for FPGA and SoC designs
• Create C/C++ based testcases and verification frameworks for embedded processor and subsystem validation
• Develop and enhance SystemVerilog/UVM testbenches for IP, subsystem, and SoC-level verification
• Verify CPU, memory, DMA, interrupt, boot, and peripheral subsystems across multiple use cases
• Drive coverage-driven verification using constrained-random and directed testing methodologies
• Develop assertions, checkers, scoreboards, and coverage models to improve verification quality
• Debug complex functional issues across RTL, firmware, and system-level environments
• Collaborate with architecture, design, firmware, and validation teams throughout the development cycle
• Develop automation and productivity enhancements using Python, Shell, Perl, and Tcl scripting
• Participate in design reviews, verification sign-offs, and methodology improvements.
Required
📌 Associate III (Hyderabad)
🏢 UST
📍 Hyderabad