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Full Chip Timing Lead -PD

THE ROLE:
• As a member of the PD Full Chip STA closure and optimization team, you will work on SoC Full Chip Timing closure which includes high frequency CPU, HBM, DDR, Serdes interfaces. Will be responsible for SDC validation and timing signoff execution with different team members and will work closely with the methodology and CAD teams across various geographies to achieve first pass silicon success.

THE PERSON:




• A successful person in this role would be able to work in a collaborative team workplace working with other business units, central methodology team driving the group signoff and solving the critical issues with vendor.
• Strong self-driving ability, should have excellent communication skills (both written and oral)

KEY RESPONSIBILITIES:
• Owns Full chip Timing Closure
• Clock build guidance using multiple methods MSCTS, Mesh
• Design repeater feedback based on timing across blocks
• Drive new improvement in closure
• Analysis of data and feedback to PD execution team
• SDC analysis and feedback
• Work with PnR engineer for timing convergence
• Drive the common STA methodology in the business unit
• Work and collaborate with different business units, CAD and central methodology team to drive the requirement
• Automation to refine and improve design signoff requirement and dashboarding
• Ability to organize and present complex technical information in a crisp and concise manner.
• In

📌 Full Chip Timing Lead (Hyderabad)
🏢 Advanced Micro Devices
📍 Hyderabad