Principal Memory Design Engineer (Bengaluru)

Principal Memory Design Engineer (Bengaluru)

09 Oct
|
ACL Digital
|
Bengaluru

09 Oct

ACL Digital

Bengaluru

Senior/Principal Memory Design Engineer

Location: Bangalore, India
Experience: 10+ Years

About ACL Digital
ACL Digital, part of the ALTEN Group, is a next-generation product engineering and semiconductor services company with global presence across 30+ countries. We specialize in ASIC/SoC design, memory IP, verification, embedded systems, automotive, 5G, AI/ML, and cloud solutions, helping clients accelerate innovation and bring cutting-edge products to market faster.
Our semiconductor engineering practice is trusted by top-tier semiconductor and system companies worldwide. With state-of-the-art R&D; centers and a 20,000+ solid engineering workforce across ALTEN, ACL Digital provides unmatched expertise in advanced node silicon design, memory IP solutions, verification, and silicon bring-up.

Role Overview
We are looking for a Senior/Principal Memory Design Engineer with deep expertise in high-performance, low-power, and high-density memory IP development for advanced process nodes.



This role involves owning architecture-to-silicon delivery of memory solutions and driving technical excellence across global design teams.
As a senior leader, you will define architectures, lead circuit and layout design, drive validation, and collaborate with foundries and SoC teams, while mentoring younger engineers and shaping ACL Digital’s memory IP roadmap.

Key Responsibilities
• Memory Architecture & Design
• Architect, design, and optimize SRAM, ROM, Register Files, CAM, and eDRAM for advanced SoCs.
• Lead bitcell modeling, sense amplifier design, redundancy schemes, and peripheral circuit design.
• Deliver low-power, high-speed memory IPs with best-in-class PPA.
• Implementation & Sign-off
• Own full flow from schematic design, spice simulations, custom layout guidance, to sign-off.
• Ensure robustness across PVT corners, aging, IR drop, EM, and reliability constraints.
• Collaborate with SoC teams for seamless memory integration and closure.
• Validation & Characterization
•

📌 Principal Memory Design Engineer (Bengaluru)
🏢 ACL Digital
📍 Bengaluru

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