Job Summary

We are looking for a St Staff Engineer with hands-on development of testbenches, testcases and checkers to exercise and measure design behavior against specified intent.

Responsibilities

- Debug differences in simulated behavior of designs and design specifications.
- Contribute to the development of DV flows and methodology for improved development efficiency. Independently manage verification tasks while mentoring junior team members.
- Collaborate with cross-functional teams (Spec, Design, etc) to resolve bugs.

Minimum Qualifications

- Bachelor's degree in Electrical/Computer Engineering, Computer Science, or related field
- 8-10 years of experience in SoC verification.
- Expertise in writing tests using SystemVerilog, UVM and C.
- Experience with scripting languages like Python, Tcl/Tk, Perl.
- Understanding of SOC interconnects and bus standards such as AXI, AHB, APB.
- Excellent analytical and problem-solving skills.
- Proven written and verbal technical communication skills.
- Self-motivated,



cooperative team player able to broadly contribute project goals.
- Innovative approach to improving existing processes and methodologies.

Preferred Qualifications

- Master's degree in Electrical/Computer Engineering, Computer Science, or related field
- Experience with RISC-V, ARM and/or MIPS CPU architectures.
- Knowledge of register description languages (IP-XACT, SystemRDL, UVM RAL).
- Familiarity with Functional Safety standards (ISO 26262) and fault injection methodologies.
- Background with power-aware (UPF) and gate-level simulations (GLS)
- Familiarity of formal verification tools and techniques.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Sr Staff Design Verification Engineer SOC (Bengaluru)
🏢 Globalfoundries
📍 Bengaluru