We are looking for an adaptive, self-motivative DFT engineer to join our growing team. As a key contributor, you will be part of a leading team to drive and improve AMDs abilities to deliver the highest quality, industry-leading technologies to market. The DFT team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
The Person
You have a passion for modern, digital design, and DFT in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
Preferred Experience
- Hands on experience on SSN , OCC , TAP verification (1838 , 1149.1, 1687) ,ICL simulations, Pattern retargeting , timing and no-timing simulations, Post silicon debug .
- Working experience in multi die DFT is preferable
- Responsible for scan patterns generation, verification, delivery to Post silicon team and also support for post silicon debug
- Experience in scan-stitching; and has valuable knowledge of scan-stitching related concepts
- Excellent hands-on ATPG; and is well conversed with the files required to run ATPG
- Knowledge/experience with Tessent ATPG (mentor) is a plus
- Experience with post-silicon bring up is a plus
Academic Credentials
Bachelors degree w/7+ years or Masters degree w/5+ years in Electronics engineering/Electrical Engineering
Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.