Role Description
Who we are:
At UST, we help the world’s best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in 30+ countries, we build for boundless impact—touching billions of lives in the process. Visit us at .
Job Title
SoC Verification Engineer – NoC (Network-on-Chip)
Role Summary
The SoC Verification Engineer is responsible for verifying and validating complex SoC designs with a focus on Network-on-Chip (NoC) architectures. The role involves developing verification settings, executing test plans, debugging design issues, and ensuring high-quality silicon delivery.
Key Responsibilities
SoC & NoC Verification
• Develop and execute verification plans for SoC and NoC-based designs
• Verify NoC functionality, routing, QoS, bandwidth allocation, and traffic management
• Create and run directed and constrained-random test cases
• Ensure functional and coverage closure for assigned verification tasks
Testbench Development
• Develop UVM-based verification environments using SystemVerilog
• Create reusable verification components such as agents, monitors, scoreboards, and checkers
• Implement assertions and functional coverage models
• Maintain and enhance existing verification infrastructure
Protocol Verification
• Verify AMBA protocols including AXI, AHB, and APB
• Validate cache coherency, memory transactions, and data integrity
• Analyze interconnect behavior under different traffic scenarios
• Ensure protocol compliance and interoperability across IPs
Required Qualifications
• Bachelor's or Master's degree in Electronics, Electrical Engineering, Computer Engineering, or related field
• 4+ years of experience in SoC/IP Verification
• Robust expertise in SystemVerilog and UVM
• Hands-on experience with NoC (Network-on-Chip) verification
• Valuable understanding of AXI, AHB, APB, cache coherency, and SoC
📌 Technical Lead I Bengaluru (India)
🏢 UST
📍 India