Hiring: Design Verification Lead

We are looking for an experienced Design Verification professional with robust hands-on expertise in SystemVerilog & UVM to join our team.

Key Skills:

Strong SystemVerilog & UVM experience on live projects

Expertise in AMBA protocols & ARM CPU

Functional verification using Monitors, Checkers, Scoreboards & Assertions

Constrained-random verification & functional coverage

Unix/Linux and verification tools for configuration management, bug tracking & dashboards

Scripting: Python / Perl / Shell / Makefile

PCIe / Ethernet experience is an added advantage

Locations: Kochi | Chennai | Bangalore | Pune

If you are passionate about SoC/ASIC verification and looking for your next challenge, we’d love to hear from you!

interested? DM me or share your CV. [email protected]

Pay: ₹800,000.00 - ₹1,080,000.00 per year

Experience:

- Design verification: 5 years (Preferred)

Work Location: Hybrid remote in India

📌 Design Verification Engineer (India)
🏢 Prajnov
📍 India