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Job Description:

We are seeking a skilled and experienced DFT Engineer to join our VLSI design team. The ideal candidate should have a strong background in Design for Testability (DFT) techniques, including LBIST (Logic Built-In Self-Test), ATPG (Automatic Test Pattern Generation), DFT DRC (Design Rule Checking), MBIST (Memory Built-in Sefl-Test), Boundary Scan, JTAG and Analog/Phy DFT.

Responsibilities:

- Collaborate with the Design/Arch/PTE/PD team to ensure productive and effective testability of complex integrated circuits.
- Design and implement DFT features such as scan chains, compression, and built-in self-test structures to enhance testability.
- Conduct DFT DRC checks in RTL/Netlist database to ensure compliance with DFT guidelines and rules.
- Utilize Siemen’s DFT tool to perform DFT analysis and optimize testability metrics.
- Generating high quality manufacturing ATPG test patterns for stuck-at (SAF), transition fault (TDF) models using on-chip test compression techniques.
- MBIST Design (including repair) and Verification using Siemen’s EDA tool.
- Validation of DFT structures/patterns in RTL, Netlist with and without SDF.
- Work closely with the verification team to define and implement DFT verification plans.




- Work closely with physical design team for DFT implementation/constraints strategy for synthesis/STA.
- Analyze and debug test failures and collaborate with the test engineering team to resolve issues.
- Provide guidance and mentorship to junior DFT engineers.

Qualifications:

- Bachelor's/Master's degree in Electrical/Electronic Engineering, or a related field.
- 7-10 years of hands-on experience in DFT methodologies and techniques.
- Strong knowledge of LBIST, ATPG, DFT DRC, Scan compression, Low power DFT Techniques, MBIST, Boundary Scan, Analog DFT, JTAG Architecture, DFT STA Constraint development.
- Hand-on experience/expertise in Cadence/Siemen’s DFT EDA tools for Scan stitching, DRC, ATPG, Coverage improvement, MBIST, Boundary Scan.
- Proficiency in scripting languages such as Perl, Tcl, and/or Python for automation.
- Solid understanding of digital design fundamentals, RTL coding, Lint/CDC, Low Power Checks and ASIC design flow.
- Excellent problem-solving skills and ability to work effectively in a team-oriented environment.
- Strong communication and interpersonal skills.
Job Req Type: Experienced Required Travel: Yes, 10% of the time Shift Type: 1st Shift/Days

📌 Staff Engineer – DFT Engineering (India)
🏢 Analog Devices
📍 India