Program Manager - RTL Design (Bengaluru)

Program Manager - RTL Design (Bengaluru)

11 Oct
|
SP Software
|
Bengaluru

11 Oct

SP Software

Bengaluru

Job Role: Engineer II- Program Manager

Job Location: Bangalore - Karnataka

Exp : 3-5 years

:

This role offers a position in Infrastructure IP cores and design, targeted for variety of industry leading Snapdragon SoCs for mobile, compute, IoT and Automotive markets.

Key Responsibilities

- Micro-architecture and RTL design for IP Cores / subsystems.
- Work in close coordination with Verification, SoC, SW, PD & DFT teams for design convergence.
- Qualify designs using static tool checks including Lint, CDC, CLP etc.
- Synthesis, LEC and Netlist CLP
- Report status and communicate progress against expectations.
- Supports the establishment of program goals and prioritizes deliverables with minimal supervision.
- Take responsibility for multiple small programs with minimal complexity or a single program with moderate complexity
- by applying up-to-date program management knowledge to meet deadlines.
- Builds and manages the execution of the Plan of Record (e.g., on time, on budget, within scope) for multiple small programs, which includes schedule and
- resource forecasting, stakeholder identification, method and frequency of communication, scope, and prioritization.
- Tracks all key RTL metrics pertaining to a program, provides early warning for potential metric deviations and escalates in timely manner when metrics
- deviate significantly from Plan of Record.

Preferred Qualifications

- 3 to 5 years of robust experience in RTL design for ASICs and 1 to 2 years of Program Management or related work experience




- Expertise in RTL coding in Verilog/SV of complex designs with multiple clock domains and multiple power domains
- Familiar with UPF and power domain crossing
- Experience in Synthesis, Logical Equivalence checks, RTL and Netlist CLP, understanding of timing concepts for ASIC is an added advantage
- Familiarity with various bus protocols like AHB, AXI, APB, SPMI, I2C, SPI, clocking, reset, debug architecture
- Experience in low power design methodology and clock domain crossing designs.
- Experience with program management tools such as dashboards, Gantt charts, etc.
- Experience in Spyglass Lint/CDC checks and waiver creation
- Experience in formal verification with Cadence LEC
- Understanding of full RTL to GDS flow to interact with DFT and PD teams
- Expertise in Perl/TCL/Python language
- Experienced in database management flows with Clearcase/Clearquest.
- Excellent oral and written communications skills to ensure effective interaction with Engineering Management and team members.
- Team player, self-motivated, should be able to work with minimal supervision.
- Supports the compliance of processes by following best practices and procedures and providing observations for process improvement.

Minimum Qualifications:

- Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.

OR
- Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

Please feel free to reach out to me @[email protected]/(phone hidden)

📌 Program Manager - RTL Design (Bengaluru)
🏢 SP Software
📍 Bengaluru

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