Job Title

FPGA Design Lead - 5G / PCIe Gen 5/6/7

Location: Bangalore, Karnataka, India

Experience

10-14 Years

Industry

Semiconductor | Telecom | Networking | Product Engineering

Notice Period : Preferred Immedaite joiners.

? Hiring: FPGA Design Lead - 5G & FPGA Design Lead - PCIe Gen 5/6/7

We are looking for highly skilled FPGA Design Engineers and Technical Leads with robust experience in FPGA architecture, RTL development, high-speed interfaces, and communication protocols. This role offers an opportunity to work on cutting-edge 5G and next-generation PCIe technologies.

Key Responsibilities

✅ Design and implement FPGA-based solutions for high-performance communication systems.

✅ Participate in architecture definition, design implementation, verification, and integration activities .





✅ Develop detailed design specifications and technical documentation.

✅ Develop and implement block-level RTL using Verilog, VHDL, and SystemVerilog .

✅ Perform FPGA synthesis, place & route, static timing analysis (STA), and timing closure .

✅ Collaborate with Hardware, Software, Validation, Diagnostics, Signal Integrity, and System Engineering teams.

✅ Support subsystem bring-up, FPGA debugging, integration, and system validation activities.

✅ Drive technical discussions, design reviews, and mentor junior engineers (for Lead positions).

Email :: [email protected]/[email protected]

📌 FPGA Design Lead (Bengaluru)
🏢 Capgemini Engineering
📍 Bengaluru