11 Oct
|
Mirafra Technologies
|
Hyderabad
11 Oct
Mirafra Technologies
Hyderabad
Experience:10+ years
Location:Hyderabad
- Familiarity with SoCs and boot flow would be useful.
- SV UVM based TB environment setup, usage of UVM VIPs.
- Developing UVM sequences, tests, TB bring up and sanity regressions.
- Familiarity with Software development flow including assembly and C is beneficial.
- Knowledge of system-level architecture including buses like AXI/CHI/ACE5, bridges, memory controllers such as DDR5/LPDDR5/DDR4/LPDDR4
- Knowledge of one or more protocols; PCIe, USB, Ethernet
- Sound knowledge on UPF and power domain crossing
- Excellent waveform debug skills using front end industry standard design tools like VCS, NCSIM, Verdi
- Strong expertise in DFT-DV verification, like Scan clear / Mem transparent / JTAG / IJTAG / Memory repair, Scan dump, ATPG etc…
📌 Design Verification Lead (Hyderabad)
🏢 Mirafra Technologies
📍 Hyderabad