WE ARE HIRING: Senior Physical Design Engineer
ACL Digital is expanding its Semiconductor/VLSI practice in Bengaluru! We are looking for an experienced Physical Design Engineer with 5+ years of hands-on expertise to drive full-flow RTL-to-GDSII execution on advanced technology nodes.
Key Role Details
- Role: Physical Design Engineer
- Experience Required: 5+ Years
- Location: Bengaluru, Karnataka
- Notice Period: Immediate to 30 Days ONLY
Key Responsibilities
- Lead Netlist-to-GDSII flow including Floorplanning, Placement, Clock Tree Synthesis (CTS), Routing, and Timing Closure (STA).
- Execute Static Timing Analysis (STA), cross-talk noise analysis, power network analysis (IR-drop/EM), and Physical Verification (DRC/LVS/ERC).
- Hands-on work on lower-node designs (e.g.,
7nm / 5nm / 3nm).
- Collaborate with Front-End, DFT, and Package design teams for successful tape-out execution.
Tech Stack / Requirements
- Proven expertise in standard industry EDA tools (Innovus, ICC2, Primetime, Calibre, Voltus/StarRC).
- Robust understanding of low-power design methodologies (UPF/CPF, Clock Gating, Multi-VT).
- Excellent scripting skills in Tcl, Perl, or Python for flow automation.
How to Apply
Interested candidates with a notice period of 30 days or less, please share your updated CV to
[email protected]
📌 Senior Physical Design Engineer (Bengaluru)
🏢 ACL Digital
📍 Bengaluru