We are seeking an experienced RTL Design Lead to drive the architecture, design, and delivery of complex ASIC/SoC projects. The ideal candidate will possess solid RTL design expertise, technical leadership skills.

Experience : 7 to 16 Yrs

Location : Bangalore

Key Responsibilities
Lead end-to-end RTL design development for complex ASIC/SoC programs.
Define micro-architecture and guide the implementation of high-quality RTL designs.
Lead IP/subsystem integration and ensure adherence to design methodologies.
Review RTL code, architecture documents, and design specifications.
Mentor and technically guide a team of RTL engineers.
Drive design reviews, technical discussions, and issue resolution.
Collaborate with DV, DFT, Physical Design, STA, and Firmware teams for successful project execution.
Ensure design quality through Lint, CDC, RDC, and synthesis checks.




Support project planning, resource allocation, effort estimation, and risk management.
Interface with customers and stakeholders on technical deliverables and project status.

Required Skills
Solid expertise in RTL Design using Verilog/SystemVerilog.
Proven experience in ASIC/SoC Design and Architecture.
Hands-on experience in:
Micro-Architecture Development
RTL Coding and Integration
Lint, CDC, RDC
Synthesis and Timing Analysis
Design Debug and Root Cause Analysis
Robust understanding of AMBA protocols:
AXI
AHB
APB
Experience with high-speed interfaces such as PCIe, DDR, Ethernet, USB, or SerDes.
Excellent technical leadership and stakeholder management skills.

📌 Design Engineer Bengaluru (India)
🏢 Lu0026T Technology Services
📍 India