Role: STA Lead (Physical Design) | 13+ Years Experience
Mission: Own full-chip timing closure, sign-off convergence, and constraint management (SDC) for advanced-node SoCs.
Must-Haves: Deep expertise in Synopsys PrimeTime, multi-corner/multi-mode (MCMM) analysis, low-power design, and ECO closure.
Leadership: Drive cross-functional sign-off execution and mentor junior layout/timing engineers to successful tape-outs.
📌 STA Lead (Bengaluru)
🏢 ACL Digital
📍 Bengaluru
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