Job Role : FPGA Prototyping Engineer
Experience : 5+ years
Location : Bangalore
Responsibilities:
• Perform pre-silicon FPGA prototyping and bring-up of the ASA IP digital subsystem.
• Partition Camera Serializer digital logic for Xilinx VCU128 / Alveo FPGA platforms, including FPGA-friendly clock domain replacement for PHY-derived clocks.
• Execute ASA IP FPGA bring-up, including SoC slave bus access, ASEP stream validation, and OAM link establishment over cable using reference hardware.
• Perform CSI-2 video capture and pixel integrity checks using an FPGA-based MIPI sink.
• Develop bring-up and automation scripts using Python and Tcl.
• Perform hardware debugging using ILA, VIO, and ChipScope, along with lab validation using oscilloscopes and BERTscope.
Requirements:
• Hands-on experience with FPGA prototyping, bring-up, and hardware debugging.
• Proficiency in Xilinx Vivado / Vitis tools.
• Knowledge of SystemVerilog RTL and Tcl scripting.
• Experience with SerDes or MIPI FPGA bring-up is preferred.