Staff Engineer, Design Verification - High-Speed Interface IP
We Are
Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D; capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.
You Are
You are an experienced Digital Verification engineer who enjoys solving complex verification challenges in high-speed digital designs. You bring a robust understanding of ASIC design and verification methodologies and have hands-on experience verifying designs involving high-speed interface protocols.
You are comfortable working with complex RTL designs, developing verification environments, debugging failures, and driving verification to closure. Experience with PCI/PCIe or USB interfaces is particularly valuable,
with USB experience highly preferred for this position.
With approximately 5–6 years of relevant experience, you are ready to take ownership of verification activities while collaborating closely with design engineers and other technical teams.
What You'll Be Doing
• Develop and execute verification strategies for complex ASIC and digital IP designs.
• Build, enhance, and maintain verification environments for high-speed digital interfaces.
• Develop test plans, test cases, stimulus, checkers, and coverage models to achieve verification objectives.
• Verify functionality of designs involving high-speed protocols, particularly PCI/PCIe and USB.
• Debug simulation failures and collaborate with RTL design engineers to identify and resolve functional issues.
• Analyze functional and code coverage and drive verification toward closure.
• Participate in design and verification reviews and contribute to im