- Valuable understanding of DDR4/5, LP4/5 functionalities; DDR hands-on is a must
- Test content development using Python is a must
- Functional & margining testing experience in DDR or other HSIOs
- Must be a self-starter, able to independently drive tasks to completion with minimum guidance
- Ability to apply knowledge of other high-speed, high-performance memory technologies
- Hands-on experience in using industry standard JTAG, I2C, analyzers and lab tools
- Able to use oscilloscopes, multimeter, power supply & thermal equipment
- Able to read/understand schematics & layout
- Experience with system validation with x86 processors is a plus
- Experience with RAS is a plus
Roles & Responsibilities
- Develop functional validation plans for DDR controller features; align cross-functional teams on the support and validation plans
- Develop functional validation plans for RAS features (Reliability, Availability, Serviceability); align cross-functional teams (BIOS/firmware)
on the support and validation plans
- Drive debug in post silicon, root-cause problems and steer the team to the best corrective action to move forward
- Work as a team and work efficiently in a dynamic environment and on multiple projects
- Develop scripts in Python & automate test cases/debug scripts to avoid manual work
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