3–7 years of experience having robust expertise in IP Verification, Functional Coverage, Assertions, SystemVerilog (SV), and UVM. Experience with the Ethernet protocol is mandatory, while PCIe experience will be an added advantage.
Skills
Ethernet, PCIe, SystemVerilog, UVM
📌 Technical Lead I - VLSI (Bengaluru)
🏢 UST
📍 Bengaluru
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