We are seeking a motivated Senior Emulation Engineer to support pre-silicon validation of next-generation processor and SoC products using Synopsys ZeBu emulation platforms. The role involves emulation bring-up, hardware-software co-validation, debug, and performance optimization of complex SoC designs.
Key Responsibilities
- Deploy and validate RTL designs on Synopsys ZeBu emulation platforms.
- Develop and maintain synthesizable testbenches and emulation flows.
- Perform SoC/IP bring-up, functional validation, and debug.
- Support firmware and software teams for early boot and system validation.
- Analyze failures, debug RTL issues, and drive root-cause resolution.
- Automate emulation and regression flows using scripting languages.
Required Skills
- 5-8 years of experience in ASIC/SoC verification, validation, or emulation.
- Hands-on experience with Synopsys ZeBu platforms.
- Solid knowledge of Verilog/SystemVerilog and UVM.
- Experience with SoC architectures and bus protocols such as AXI/AHB/APB.
- Proficiency in Python,TCL, or Shell scripting.
- Strong debugging and problem-solving skills.
Preferred Skills
- Experience with RISCV processor-based SoCs.
- Exposure to firmware bring-up, Linux boot, or hardware-software co-verification.
- Experience with Palladium, Veloce, or FPGA prototyping is a plus.