- Develop SOC system level test setting for simulation and emulation, including log generation, backdoor configuration and device modeling
- Develop testplan and tests, including error condition tests and stress tests
- Run and debug tests in regressions, both in simulation and on emulator
- Work with other teams in root-causing HW issues, and creating system level test cases for them
- Validation ROM
- Work with SW team in debugging device driver issues, and OS boots
Qualifications
- 7 years of DV or validation experience, and 5 years of system Level verification experience using C
- Has worked through complete project cycle of an SOC ASIC chip
- Thorough understanding of CPU and its debug architecture, as well as SOC system architecture
- Proficient in programming and modeling typical SOC connected devices, such as JTAG, UART, SPI, I2C.
- Proficient in test planning, test case development using C, and self checking in such tests
- Proficient in RTL debugging using waveform viewer
- Mastery in C programming, and fluent in scripting languages such as Make, Python, Perl and shell script
- Fluent in documentation and issue tracking using Confluence and Jira tools
- Preferred experience in
- Validation on emulation, FPGA and post-silicon
- Complex IP interface validation of USB, Ethernet, PCIE, DDR
- Using AI tools in test planning, generation and debugging