Hello Everyone!!!
We are seeking RTL Design Engineer with 3- 5Years of Experience for the Position in Hyderabad
Candidates who can start immediate or within 15 Days are preferred*.
Interested individuals or referrals can share profile with us.
Qualifications: B.Tech/B.E/M.Tech/M.E
Below the JD:-
Primary skill - STA , SDC constraints
Secondary skill - RTL synthesis
Synthesis flow and methodology.
SOC-level synthesis experience.
Handover readiness from Synthesis to Physical Design (PD).
Basic checks that must be completed before design handoff.
Timing analysis fundamentals.
STA flow and methodology.
Constraints creation and validation.
Timing report analysis and interpretation.
Timing violation identification and debugging.
Timing closure concepts.
Constraint prioritization and STA signoff checks
Apply Now!!!
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📌 RTL Synthesis Engineer (Hyderabad)
🏢 ElevarSoC Technologies
📍 Hyderabad