FPGA Design Engineer HDL Design (Pune)

FPGA Design Engineer HDL Design (Pune)

15 Oct
|
Bit Mapper Integration Technologies
|
Pune

15 Oct

Bit Mapper Integration Technologies

Pune

Job highlights

- Good at Verilog or VHDL .
- Experience with Xilinx / Altera tool flow . .
- Good at Verilog or VHDL
- Experience with Xilinx/Altera tool flow

- Knowledgeable about FPGA architecture
- Knowledge of interfaces like, PCIe, USB, Ethernet, SerDES Memories like DDR .etc will be an added advantage
- Good Logic ability and Digital Fundamentals
- Interfacing between engineering team of different customers and our design Team

- Valuable Analog Fundamentals

- Good general engineering fundamental

📌 FPGA Design Engineer HDL Design (Pune)
🏢 Bit Mapper Integration Technologies
📍 Pune

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