Job highlights

- M Tech / B Tech in the field of VLSI / Electronics engineering
- Team player,with good problem solving and communication skills
- Must have performed gate level sim at SoC level
- Must have worked on ARM / RISC-V CPU based designs
- Experience in UPF based low power design verification
- Pre and Post-silicon debug / verification experience will be a plus

1. M. Tech / B. Tech in the field of VLSI/Electronics engineering.
2. Proficiency in UVM/SV and C/C++ based functional verification.
3. Experience in UPF based low power design verification.
4. Automation skills in PERL and/or TCL and/or Shell.
5. Team player, with positive problem solving and communication skills.

:

1. Drive functional verification at IP/SoC level using UVM/SV test bench.
2.



Work closely with design team to define comprehensive feature test plans.
3. Perform functional and code coverage for logic verification sign-off.
4. Must have worked on ARM/RISC-V CPU based designs.
5. Must have performed gate level sim at SoC level.
6. Pre and Post-silicon debug/verification experience will be a plus.

Interpersonal Skills:

1. Energetic, self-motivated
2. Pro-active, oriented on execution
3. Attentive to details and quality

4. Team player
5. Good communications and reporting skills

📌 Digital Verification Engineer / Lead (Pune)
🏢 Espressif Systems India
📍 Pune