Job highlights

- Bachelors or Master s Degree in Electrical or Computer Engineering required with at least 8+ years of experience.

- Minimum Qualifications

- Preferred Qualifications

Job Summary The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world.

Your Impact

- You will work with Front-end RTL teams, backend physical design teams to understand chip architecture and drive high-quality DFT verification.

- Responsible for thorough test planning and development of test benches to verify comprehensive Design-for-Test (DFT) architecture that supports ATE screening, in-system test, debug and diagnostics needs of the design

- Collaborate with the design/design-verification and PD teams to enable the integration and validation of the test logic in all phases of the implementation and post silicon validation flows.

- Work with the team on Innovative Hardware DFT test strategy aspects for current silicon device models,



bare die stacked die, driving re-usable test and debug methodologies and standards.

- The job requires the candidate to have the ability to craft solutions and debug efficiently.

Minimum Qualifications

- Bachelors or Master s Degree in Electrical or Computer Engineering required with at least 8+ years of experience.

- Experience in developing detailed test plans and test benches for DFT verification

- Prior experience in test planning based on complex design specification.

- Prior experience in testbench development using System Verilog.

- Debugging experience using DVE/Verdi.

- Scripting skills: Tcl, Python/Perl.

Preferred Qualifications

- UVM and advanced System Verilog knowledge.

- Knowledge about JTAG protocol, scan architecture, MBIST and boundary

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 ASIC DFT DV Engineer || System Verilog, UVM || JTAG, MBIST (Hyderabad)
🏢 Cisco
📍 Hyderabad