ASIC RTL Design Architect (Bengaluru)

ASIC RTL Design Architect (Bengaluru)

16 Oct
|
Leadsoc Technologies
|
Bengaluru

16 Oct

Leadsoc Technologies

Bengaluru

ASIC RTL Design Architect
Location: Bengaluru
Experience: 12–18 Years
Role Overview
We are seeking a technically accomplished ASIC RTL Design Architect to define microarchitecture and lead RTL development for complex, high-performance ASIC/SoC designs. The role demands deep expertise in RTL design, microarchitecture, design optimization, and implementation-aware design across advanced semiconductor technologies.
Key Responsibilities
• Define and drive microarchitecture and RTL architecture for complex IPs and SoC subsystems.
• Translate architectural specifications into synthesizable, optimized RTL using Verilog/SystemVerilog.
• Lead microarchitecture definition, design trade-off analysis, and architectural reviews.
• Develop high-quality RTL for performance-critical datapaths, control logic, pipelines, and interface logic.
• Drive PPA optimization across timing, power, and area through RTL-level analysis and design improvements.
• Identify critical timing paths, resolve RTL bottlenecks, and optimize logic structures for synthesis and physical implementation.
• Define reset,



clocking, low-power, and clock-domain crossing (CDC) strategies.
• Ensure RTL quality through lint, CDC/RDC checks, synthesis analysis, and formal equivalence validation.
• Collaborate with Design Verification, Physical Design, DFT, and SoC Architecture teams to ensure design quality and implementation readiness.
• Drive design reviews, root-cause analysis, and resolution of complex RTL and integration issues.
• Establish RTL coding guidelines, reusable design methodologies, and architectural best practices.

Required Technical Skills
• 12–18 years of hands-on experience in ASIC RTL design and microarchitecture.
• Expert-level proficiency in Verilog/SystemVerilog and synthesizable RTL coding.
• Solid understanding of digital design fundamentals, computer architecture, pipelining, and state-machine design.
• Proven experience in microarchitecture development for complex IPs or SoC subsystems.
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📌 ASIC RTL Design Architect (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru

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