Analog Layout Engineer | 4+ Yrs (Pune)

Analog Layout Engineer | 4+ Yrs (Pune)

16 Oct
|
Leadic Design
|
Pune

16 Oct

Leadic Design

Pune

Hiring Analog Layout Engineers (4–10 yrs) with TSMC 2nm/3nm/5nm/7nm experience. Cadence Virtuoso required. Locations: Pune & Bengaluru. Notice period: Immediate–30 days. Apply: [email protected]

Perks and advantages

Competitive compensation & global client exposure

📌 Analog Layout Engineer | 4+ Yrs (Pune)
🏢 Leadic Design
📍 Pune

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