Senior Staff Engineer – Physical Design (EMIR)

Location: Bengaluru

Experience: 10–15 Years

Role Overview

We are looking for a technically strong Senior Staff Engineer with deep expertise in Physical Design and Electromigration (EM) and IR Drop (IR) analysis for complex ASIC/SoC designs. The role focuses on power integrity, EMIR sign-off, physical implementation optimization, and closure across advanced technology nodes.

Key Responsibilities

- Drive end-to-end physical design activities, including floorplanning, placement, clock tree synthesis (CTS), routing, and physical sign-off.
- Own EMIR analysis and sign-off, including static and energetic IR drop, signal EM, and power-grid EM analysis.
- Analyze and debug EMIR violations; drive root-cause analysis and implement corrective actions.
- Optimize power distribution networks (PDN), power straps, via structures, and power-grid connectivity to meet reliability and voltage-drop requirements.
- Perform power integrity analysis across multiple operating modes, corners, and activity scenarios.
- Collaborate with RTL, synthesis, timing, and physical design teams to resolve power integrity and timing-related issues.
- Drive timing, congestion, power, and area optimization while maintaining EMIR and reliability constraints.
- Support sign-off closure through iterative analysis, ECO implementation, and correlation between implementation and sign-off tools.




- Develop automation scripts and methodologies to improve EMIR analysis efficiency and sign-off quality.

Required Technical Skills

- 10–15 years of hands-on experience in ASIC/SoC Physical Design.
- Strong expertise in EMIR analysis, debugging, optimization, and sign-off.
- Experience with static and dynamic IR drop, signal EM, power-grid EM, and power integrity analysis.
- Proficiency in industry-standard tools such as Cadence Voltus, Ansys RedHawk-SC, or equivalent.
- Strong understanding of power delivery networks, power-grid design, current density, voltage drop, and electromigration reliability.
- Hands-on experience with floorplanning, placement, CTS, routing, and physical sign-off.
- Strong understanding of STA, timing closure, power optimization, and physical implementation trade-offs.
- Experience with advanced technology nodes, multi-corner analysis, and sign-off methodologies.
- Proficiency in Tcl scripting; Python or Perl scripting is an advantage.

Preferred Qualifications

- Experience with high-performance CPU, GPU, networking, or complex SoC designs.
- Exposure to advanced-node power integrity challenges and reliability sign-off.
- Experience with EMIR methodology development, automation, and cross-functional technical leadership.

Education: B.E./B.Tech/M.E./M.Tech in Electrical Engineering, Electronics, or a related discipline.

📌 Senior Staff Engineer – Physical Design (EMIR) (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru