Job highlights

- Digital Logic Design: Strong expertise in digital logic design with hands-on . experience in RTL coding using Verilog and SystemVerilog
- Peripheral Design: Experience in designing high-speed and low-speed peripherals

Digital Logic Design: Strong expertise in digital logic design with hands-on experience in RTL coding using Verilog and SystemVerilog. Peripheral Design: Experience in designing high-speed and low-speed peripherals.

Design Optimization: Deep understanding of synthesis, timing constraints, clock domain crossing (CDC), and logic optimization techniques.

Automation: Proven experience in automating RTL generation for various design

Low Power Design: Exposure to low power design techniques, including working with multiple power and clock domains.

SoC Integration: Familiarity with ARM SoC,



AMBA IP-based designs, and SoC/sub-

Protocol Knowledge: Strong knowledge of protocols such as PCIe, DDRx, Ethernet,

USB, AXI, AHB, APB, I2C, and SPI is highly desired.

Expectations from the Role

Communication & Independence: Excellent communication and interpersonal skills,

with the ability to work independently.

Adaptability: A quick learner who can efficiently operate in a distributed work

Initiative & Punctuality: Demonstrates ownership, initiative, and punctuality in all responsibilities.

Leadership: Ability to mentor and lead a team to solve complex design challenges.

📌 Functional Verification Engineer (Bhubaneswar)
🏢 ARF Design
📍 Bhubaneswar