???? ???? ?? ??? ??? ?? ??? ???????'? ??????? ?????? ?????: ?? ??????? - ?? ??????? (?? ??? ??-?? ???) Experience: 8+ yrs Location: Banglore We are looking for an experienced AMS Verification Lead with strong hands-on expertise in Analog/Mixed-Signal (AMS) verification, SystemVerilog, UVM, and Real Number Modeling (RNM). The ideal candidate will lead verification activities for mixed-signal IPs, develop robust verification environments, drive functional coverage closure, and ensure high-quality verification sign-off. This role requires a strong understanding of analog-digital interactions, verification methodologies, simulation workflows, and semiconductor design processes.

The successful candidate will combine technical depth with ownership of verification planning, execution, debugging, and team collaboration.

Requirements Key Responsibilities - Lead end-to-end verification of analog and mixed-signal IPs, ensuring functional correctness and verification readiness.

- Develop comprehensive verification plans, test strategies, testbenches, and verification methodologies based on design specifications.
- Build, maintain, and enhance SystemVerilog and UVM-based verification environments.
- Develop, integrate, and validate Real Number Models (RNM) for analog blocks and mixed-signal verification.
- Verify interactions between analog and digital components, including interface behaviour, signal transitions, and functional dependencies.
- Perform functional coverage analysis, identify coverage gaps, debug simulation failures, and drive coverage closure.
- Verify mixed-signal IPs such as ADCs, DACs, PLLs, oscillators, and LDOs.
- Manage simulation regressions, track verification schedules, monitor deliverables, and support verification sign-off.
- Collaborate with analog design, digital design, SoC verification, and other engineering teams to resolve technical issues.




- Investigate verification failures, perform root-cause analysis, and recommend corrective actions.
- Maintain verification documentation, test results, coverage reports, and technical sign-off records.
- Identify opportunities to improve verification efficiency through automation, reusable components, and better workflows.
- Provide technical leadership, review verification approaches, and mentor engineers on AMS verification best practices.

What Makes

You a Outstanding Fit - 8+ years of experience in semiconductor verification, with substantial hands-on experience in Analog/Mixed-Signal verification.

- Strong proficiency in SystemVerilog and UVM for developing and maintaining verification environments.
- Practical experience with Real Number Modeling (RNM) and mixed-signal verification methodologies.
- Strong understanding of analog-digital interface verification and mixed-signal simulation concepts.
- Experience verifying analog or mixed-signal IPs such as ADCs, DACs, PLLs, oscillators, and LDOs.
- Proven skills in simulation debugging, functional coverage analysis, regression management, and verification sign-off.
- Ability to independently own verification planning, execution, issue resolution, and technical deliverables.
- Familiarity with tools such as Cadence Virtuoso, AMS Designer, or equivalent AMS simulation platforms.
- Knowledge of analog behavioural modelling and SystemVerilog-AMS is an advantage.
- Experience with semiconductor IP verification or SoC-level verification is desirable.
- Proficiency in Python or Tcl scripting for verification automation is a plus.
- Strong analytical, debugging, and problem-solving skills with excellent attention to detail.
- Effective communication and collaboration skills across multidisciplinary engineering teams.
- Previous experience mentoring verification engineers or leading technical activities is preferred.

📌 Analog Mixed Signal Engineer (Bengaluru)
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📍 Bengaluru