17 Oct
|
Uandwe Technologies
|
Bengaluru
17 Oct
Uandwe Technologies
Bengaluru
Job highlights
Deep knowledge and hands on experience with Scan insertion flows and resolving DRC . On ChipClock controller . Test Compression techniques . ATPG (experience with Tessent preferred) . Test vectors and Simulation debug . .
Develop and implement DFT infrastructure in Silicon design
Verify DFT implementation for Correctness
Generate test vectors, analyze and debug simulation results, improve coverage
Deep knowledge and hands on experience with Scan insertion flows and resolving DRC
On ChipClock controller
Test Compression techniques
ATPG (experience with Tessent preferred)
Test vectors and Simulation debug
📌 Dft Engineer Bengaluru
🏢 Uandwe Technologies
📍 Bengaluru