Job highlights
Experience with power-aware verification (UPF / CPF) and subsystem-level GLS. Hands-on experience with ClearCase,Perforce,and major EDA simulation / debug tools.
The ideal candidate will have a deep understanding of ARM / RISCV architectures,AXI / AHB/APB protocols,and be proficient in industry-standard verification methodologies and tools

Location : Bangalore

Experience: 5+ Years

:

We are looking for a highly skilled Design Verification Engineer with extensive experience in CPU subsystem verification, bus protocol validation, and power-aware verification. The ideal candidate will have a deep understanding of ARM/RISCV architectures, AXI/AHB/APB protocols, and be proficient in industry-standard verification methodologies and tools.

Key Responsibilities:

Perform CPU (ARM/RISCV) subsystem verification including performance modeling and validation.

Verify bus protocols and bridge logic, including AXI, AHB, and APB interfaces.

Develop test benches and verification settings using System Verilog and UVM/OVM.

Execute power-aware verification flows using UPF/CPF,



ensuring low-power design integrity.

Conduct subsystem-level and GLS (Gate-Level Simulation) verification.

Analyze and report performance verification metrics, identifying and optimizing bottlenecks.

Use ClearCase/Perforce for configuration management and debug/simulation environments for issue resolution.

Automate verification tasks using scripting languages such as Perl, Tcl, or Python.

Required Skills and Experience:

eep understanding of bus protocols (AXI, AHB, APB) and bridge logic.

Solid experience in CPU subsystem verification and performance modeling.

Proficiency in System Verilog, UVM/OVM, and Verilog.

Experience with power-aware verification (UPF/CPF) and subsystem-level GLS.

Hands-on experience with ClearCase, Perforce, and major EDA simulation/debug tools.

Scripting proficiency in Perl, Tcl, and/or Python.

Excellent debugging, analytical, and problem-solving abilities.

📌 Design Verification Engineer Cpu Subsystem, Bus Protocols Hyderabad
🏢 Symphisys
📍 Hyderabad