17 Oct
|
Symphisys
|
Hyderabad
17 Oct
Symphisys
Hyderabad
Job highlights
Experience in System Verilog and UVM is a must
Experience: 4+ Years .
Hands on experience in IP / Block or Sub system level verification
Hands on experience in Low Power Verification / UPF,code overage and functional coverage
Experience in Formal verification
Experience in ARM Protocols - AXI and AHB
Location : Bangalore
Experience: 4+ Years
Mandatory Skills
Hands on experience in IP/Block or Sub system level verification.
Hands on experience in Low Power Verification/UPF, code overage and functional coverage.
Experience in Formal verification.
Experience in System Verilog and UVM is a must.
Experience in ARM Protocols - AXI and AHB.
Familiarity with scripting languages like Perl, Python.
📌 Design Verification Engineer Systemverilog /uvm /low Power / Formal Hyderabad
🏢 Symphisys
📍 Hyderabad