Design Verification Technical Team Lead

Job Summary

We are looking for a Design Verification Technical Team Lead with solid expertise in system-level verification of complex ARM-based SoCs. The role involves chip-level verification, debugging, ROM validation, and firmware bring-up for Smart Edge SoCs used in network and systems control, security management, and IoT applications.

The ideal candidate will have hands-on experience in C-based system-level verification, simulation and emulation environments, CPU and SoC architecture, and firmware/OS boot debugging.

Key Responsibilities

Develop SoC system-level test environments for simulation and emulation, including log generation, backdoor configuration, and device modeling.

Define test plans and develop functional, error-condition, stress, and self-checking test cases.

Execute and debug regression tests in simulation and on emulation platforms.

Collaborate with cross-functional teams to identify root causes of hardware issues and develop system-level test cases.

Perform ROM validation and support firmware bring-up.

Work with software teams to debug device driver issues and operating system boot failures.

Verify system initialization, reset handling, recovery flows, and firmware-update mechanisms.

Document verification results, track issues, and coordinate resolution with relevant teams.

Required Qualifications





7+ years of experience in design verification or SoC validation, including 5+ years of system-level verification using C.

Experience working through a complete SoC ASIC project lifecycle.

Strong understanding of CPU debug architecture and SoC system architecture.

Proficiency in programming and modeling SoC-connected devices and interfaces such as JTAG, UART, SPI, and I2C.

Strong test planning, C-based test development, and self-checking test implementation skills.

Proficiency in RTL debugging using waveform viewers.

Strong C programming skills and scripting experience with Make, Python, Perl, and Shell.

Experience with technical documentation and issue tracking using Confluence and JIRA.

Preferred Qualifications

Experience with emulation, FPGA-based validation, and post-silicon validation.

Experience validating complex IP interfaces such as USB, Ethernet, PCIe, and DDR.

Experience using AI tools for test planning, test generation, and debugging.

Additional Technical Requirements

Management protocols: SPDM, PLDM, and MCTP.

Security: Caliptra, cryptographic APIs, and security-related functionality.

Boot and platform firmware: Bootloaders, platform initialization, boot flows, reset handling, recovery, and firmware-update mechanisms.

Firmware security: Firmware authentication, digital signature verification, and OTP provisioning.

📌 Technical Team Lead (Hyderabad)
🏢 Modernize Chip Solutions
📍 Hyderabad