Locations: Chandler (Office), Bangalore, Hyderabad, Austin (Oakhill, Office), San Jose (Holger Way)

Time Type: Full time

Posted On: Posted Today

Job Requisition ID: R-10067177

Job Responsibilities:

- Define and maintain the NPU software product roadmap spanning the full stack: AI/ML compiler pipeline, AI/ML tools for optimization (conversion, quantization, pruning), runtime and execution engine, SDK and developer APIs, model optimization, workflow and repository, and existing eIQ platform integration.
- Own and create a scalable platform/toolkit to support newer model architectures (CNNs, LLMs, ViTs, VLMs) and enable a path to Day 0 model support in the long run.
- Maintain familiarity with supported architectures and operators, align customer expectations with available model support, and work with Engineering to close identified gaps.
- Engage closely with GTM to help prioritize industry verticals, segments, and use cases to create an enablement strategy for all business units.
- Enable system-level solutions through pre-sales and sales strategy and support.
- Define an integrated compiler strategy and transition all NXP AI products to a unified AI workflow across business units.
- Continuously monitor AI market developments and trends (compilers, operators, frameworks, models, microservices, skills, and agents) and build or refine NXP's AI strategy.
- Drive the eIQ integration strategy-integrate the current- and next-generation Neutron compiler and SDK within NXP's eIQ developer environment and define NPU support for the existing MPU/MCU developer base. Create a cradle-to-grave plan for features and components during eIQ integration.
- Develop use-case-driven software enablement and help prioritize, reset, and reconcile existing features to deliver a holistic user experience.
- Own the upstream open-source compiler integration strategy-define NXP's participation and contribution roadmap for Apache TVM, MLIR/LLVM, ONNX Runtime, and PyTorch/TensorFlow export paths.
- Define and maintain the model zoo or an equivalent-curate, compile, quantize,



and benchmark frontier models (LLaMA variants, YOLO generations, Whisper, Phi, Gemma, custom vision transformers) on Ara NPU and publish validated results.
- Own the developer experience end-to-end: SDK installation, model import workflow, compilation, profiling, debugging, and deployment-define and track developer adoption funnel metrics.
- Manage framework and ISV partner relationships-PyTorch, TensorFlow, Hugging Face, ONNX Runtime, and key vertical AI software partners; drive NPU support contributions and co-marketing. Support external software integrations and licensing partnerships.
- Run beta and early-access programs with strategic developer customers; translate feedback into prioritized engineering requirements.
- Define software versioning policy, backward compatibility commitments, and long-term support (LTS) release strategy.
- Own competitive benchmarking of model coverage against Qualcomm AI Hub, DeepX, Axelera Metis SDK, and Arm NN/ExecuTorch while preserving software ease of use.
- Maintain a working knowledge of firmware and PCIe and USB drivers.
- Develop end-to-end system software solutions and demonstration platforms for hardware and software developers at industry events and conferences.

Job Qualifications:

- 8+ years of AI product management experience in software, developer tools, or AI/ML infrastructure, with direct ownership of a software product roadmap and developer-facing API surface.
- Strong understanding of the inference model deployment pipeline-training frameworks (PyTorch, TensorFlow), model exchange formats (ONNX, TFLite), and inference runtime environments.
- Familiarity with compiler toolchain concepts: graph optimization, operator fusion, quantization,



and code generation-sufficient to write actionable requirements and evaluate engineering tradeoffs.
- Experience defining and tracking developer adoption metrics-SDK downloads, model compilations, active deployments, and support ticket analysis.
- Track record of driving open-source or partner ecosystem strategy-upstream contributions, ISV enablement, or developer community programs.
- Strong prioritization discipline-experience managing a large backlog across multiple engineering teams with competing priorities.
- Excellent technical communication skills; able to write a developer-facing API specification and an executive strategy memo in the same week.

Valuable to have:

- Direct experience with MLIR, TVM, ONNX Runtime, or other open-source ML compiler frameworks.
- Hands-on experience with model quantization-INT8/INT4/FP16, calibration workflows, and accuracy validation.
- Background in NPU, GPU, or inference accelerator software stacks-Qualcomm SNPE/QNN, Hailo Dataflow Compiler, TensorRT, Core ML, or equivalent.
- Experience with heterogeneous execution environments-managing workload dispatch across CPU, GPU, and dedicated accelerators.
- Familiarity with embedded Linux, Android, or RTOS software environments for edge deployment.
- Understanding of automotive software standards, including AUTOSAR and ASPICE, as well as functional safety and security, is a plus for MCU and MPU alignment.
- MBA or advanced degree in computer science, electrical engineering, or a related discipline.

More information about NXP in the United States...

NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.

Locations: Chandler (Office)

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