Role & Responsibilities
Execute RTL design and coding with solid proficiency in Verilog and VHDL.
Integrate ARM core-based designs into System-on-Chip (SoC) architectures.
Work with AMBA bus protocols, including AXI, AHB, and APB.
Perform Lint and Clock Domain Crossing (CDC) analysis to ensure design quality.
Work on FPGA-based designs and FPGA prototyping.
Perform ASIC synthesis and Static Timing Analysis (STA).
Conduct equivalency checking to validate design correctness.
Collaborate with cross-functional engineering teams to resolve design issues and meet project milestones.
Participate in debugging, troubleshooting, and design optimization activities.
Required Skills & Qualifications
Strong expertise in RTL design and coding.
Proficiency in Verilog and/or VHDL.
Knowledge of ARM core-based SoC integration and ARM architecture.
Hands-on experience with AMBA protocols, including AXI, AHB, and APB.
Experience with Lint and CDC analysis.
Strong understanding of ASIC synthesis and Static Timing Analysis.
Knowledge of equivalency checking methodologies.
Familiarity with FPGA design or FPGA prototyping.
Solid analytical, debugging, and problem-solving skills.
Good communication and teamwork skills.
Preferred Candidate Profile
Candidates with practical experience in RTL design and digital hardware development.
Engineers with knowledge of SoC integration and ASIC design methodologies.
Candidates capable of collaborating with cross-functional hardware engineering teams.
How to Apply
Apply with your updated resume, highlighting your RTL design experience, Verilog/VHDL proficiency, ARM SoC integration, AMBA protocols, ASIC synthesis, and Static Timing Analysis experience.
Shortlisted candidates will be contacted by zLanze for the next stage of the recruitment process.
About zLanze
zLanze is an AI-powered talent platform connecting businesses with skilled technology professionals for their hiring needs.