Emulation Model Engineer (Hyderabad)

Emulation Model Engineer (Hyderabad)

23 Oct
|
Larsen and Toubro
|
Hyderabad

23 Oct

Larsen and Toubro

Hyderabad

Subject Line: Emulation Model Engineer

Experience:
8+ Years

Location:
Hyderabad Job Summary Seeking an experienced Design Emulation Model Engineer to support SoC Platform Emulation (PEMU) initiatives for next-generation AMD SoCs. The role involves developing, integrating, and debugging full-chip and hybrid emulation models to enable presilicon firmware, BIOS, OS, and system validation. The position requires close collaboration with Design, SoC DV, Firmware, Architecture, and Emulation teams. This aligns with responsibilities described in AMD emulation planning and model enablement efforts.

Key Responsibilities
• Build, integrate, and qualify SoC emulation models for pre-silicon validation.
• Support BIOS/firmware bring-up, OS boot, and system-level use-case validation.
• Debug RTL, model integration, and emulation runtime issues.
• Enable hybrid emulation environments involving RTL, virtual platforms, and SystemC models.
• Develop automation for model builds, regressions, and debugging workflows.
• Collaborate with SoC DV, Design, Firmware, and Architecture teams to drive feature validation and issue closure.




• Support customer and internal platform validation activities. Required Skills
• 8 + of experience in SoC Verification, Emulation, FPGA Prototyping, or Silicon Validation.
• Robust knowledge of Verilog /System Verilog and SoC integration.
• Experience with emulation platforms such as Palladium, Veloce, or ZeBu.
• Good understanding of AXI, PCIe, DDR/LPDDR, Boot, Reset, Power Management, and Security flows.
• Strong debugging and root-cause analysis skills.
• Proficiency in Python, Perl, Shell, or Tcl scripting.
• Experience with Linux environments and regression automation. Preferred Skills
• Experience with firmware/BIOS bring-up and hybrid validation methodologies.
• Exposure to SimNow, SystemC, virtual platforms, or pre-silicon software enablement. ·Familiarity with large-scale SoC programs and full-chip validation flows If interested, please share your updated CV along with the following details to Usharani.
[email protected]
• Current CTC
• Expected CTC
• Notice Period

📌 Emulation Model Engineer (Hyderabad)
🏢 Larsen and Toubro
📍 Hyderabad

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