Job Title: RTL Design Engineer (Lint, CDC) - 5-9 Yrs

Location: Hyderabad

No. Of positions: 1

Experience required: 5-9 years

Education: B.E/B.tech/M.E/M.tech

Round of interviews: 2
R1: F2F
R2: F2F(Both interviews will happen on the same day)

Primary skills:

- CDC/RDC, Lint, Timing Constraints, Timing closure and Synthesis, Spy Glass, (RTL Coding is nice to have).
- We are looking for candidates with strong Front-End implementation experience, particularly in Synthesis, Timing Closure, CDC, Lint, and DFT signoff activities.

The role will primarily involve:

- Running and analyzing Synthesis, Lint, CDC, RDC, and DFT checks.
- Reviewing and developing SDC constraints.
- Performing timing analysis, debugging timing violations, and driving timing closure with
- P Design and SoC PD teams.
- Debugging and resolving CDC/Lint/DFT issues and driving signoff quality.
- Developing scripts and automation flows to improve productivity and methodology.
- Supporting design teams on implementation and signoff-related activities.

Preferred Experience

- 5-9 years of experience in Synthesis, Static Timing Analysis, CDC/RDC, Lint, and DFT methodologies.
- Strong hands-on experience with Design Compiler,



Fusion Compiler, Spy Glass (Lint/CDC/RDC), CDC0in, GCA, and related Front-End tools.
- Deep understanding of SDC constraints, setup/hold analysis, path groups, timing exceptions, clocking architecture, and timing closure methodologies.
- Experience reviewing and debugging CDC/RDC violations and driving signoff closure.
- Good understanding of scan/DFT concepts and DFT-related checks.
- Strong knowledge of clock gating, low-power design, and SoC integration methodologies.
- Experience with scripting and automation using TCL, Python, Perl, Shell, and Makefiles.
- Familiarity with RTL design and Verilog is desirable, but not a primary requirement.
- Strong debugging and problem-solving skills.
- Valuable communication skills and ability to work effectively with geographically distributed teams.

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 RTL Design Engineer (Lint, CDC) (Hyderabad)
🏢 Proxelera
📍 Hyderabad