We’re Hiring | Senior Verification Engineers | LeadSoc
We are looking for experienced Verification Engineers with expertise in CPU verification or high-speed protocols such as DDR, PCIe, Ethernet, and USB to join our engineering teams.
Locations: Bangalore & Hyderabad
Experience: 5+ years
Notice Period: Immediate to 30 days maximum
Key Responsibilities
- Develop and execute verification plans for complex IPs, subsystems, and SoCs based on design specifications and microarchitecture.
- Build, enhance, and maintain reusable SystemVerilog/UVM verification environments.
- Develop constrained-random and directed tests, sequences, drivers, monitors, and scoreboards.
- Perform functional verification of CPU designs or interfaces involving DDR, PCIe, Ethernet, or USB, depending on project requirements.
- Define functional coverage models, analyze code and functional coverage, and drive coverage closure.
- Develop assertions and protocol checkers to validate design behavior and identify corner-case issues.
- Debug simulation failures, identify root causes, and collaborate with design teams to resolve defects.
- Manage regressions, track verification progress, and communicate risks and closure status.
- Support integration, low-power verification, and gate-level simulation where applicable.
- Participate in technical reviews and mentor junior engineers.
Required Skills & Qualifications
- Bachelor’s or Master’s degree in Electronics, Electrical Engineering, Computer Engineering, or a related discipline.
- 5+ years of hands-on experience in digital design verification.
- Robust proficiency in SystemVerilog and UVM,
including testbench development and debugging.
- Experience with functional coverage, assertions, constrained-random verification, and coverage closure.
- Hands-on experience with simulation and debug tools such as VCS, Questa, Xcelium, or Verdi.
- Strong understanding of digital design fundamentals and IP/subsystem/SoC verification methodologies.
- Expertise in one or more of the following domains:
— CPU Verification: Processor architecture, instruction execution, pipelines, interrupts, caches, coherency, and memory subsystems.
— DDR Verification: DDR/LPDDR concepts, initialization, memory transactions, timing requirements, and controller/interface verification.
— PCIe Verification: Transaction, data link, and physical-layer concepts; link training, configuration, error handling, and protocol compliance.
— Ethernet Verification: MAC/PCS concepts, packet generation and checking, frame handling, flow control, and error scenarios.
— USB Verification: USB protocol fundamentals, transfers, enumeration, endpoints, link behavior, and error handling.
Preferred Skills
- Experience integrating and debugging verification IP (VIP).
- Knowledge of AMBA protocols such as AXI, AHB, APB, or CHI.
- Familiarity with scripting languages such as Python, Perl, or Shell.
- Exposure to formal verification, emulation, or low-power verification.
- Strong analytical, communication, and stakeholder collaboration skills.
? Interested candidates can share their updated CV at
[email protected]
Please mention your preferred location, relevant verification expertise, total experience, and notice period.
📌 Verification Engineer (Bengaluru)
🏢 Leadsoc Technologies
📍 Bengaluru