23 Oct
|
Scaledge
|
Bengaluru
23 Oct
Scaledge
Bengaluru
Role & responsibilities
Solid experience in System Verilog and UVM methodology
Hands-on expertise in high-speed interface protocols (PCIe / USB / DDR / Ethernet / AXI, etc.)
Good understanding of verification concepts, coverage, assertions, and debugging
Experience with simulation tools (VCS, Questa, Xcelium, etc.)
Strong analytical & problem-solving skills
📌 Senior Design Verification Engineer (Bengaluru)
🏢 Scaledge
📍 Bengaluru