24 Oct
|
CAREER MAKERS
|
Hyderabad
24 Oct
CAREER MAKERS
Hyderabad
Job Description :- 10 years with expertise in full-chip timing closureKey Responsibilities :- Lead full-chip static timing analysis and drive timing signoff for complex SoC designs- Develop advanced timing methodologies incorporating AOCV, POCV, and statistical timing analysis- Mentor timing engineers on advanced STA techniques, debugging strategies, and tool usage- Interface with design, synthesis, and physical implementation teams to resolve timing challenges- Conduct multi-voltage domain analysis and ensure proper timing across voltage level shifters- Establish timing quality metrics and implement continuous improvement initiatives- Evaluate current timing analysis tools and methodologies for improved accuracy and efficiency- Lead timing aspects of design reviews, tapeout readiness assessments, and post-silicon correlation (ref:hirist.tech)
📌 Static Timing Analysis Lead (Hyderabad)
🏢 CAREER MAKERS
📍 Hyderabad