Job highlights

- Job Summary . We are looking for an accomplished Analog and Mixed-Signal Design Engineer with relevant years of semiconductor design experience to develop high-performance,power-efficient analog,mixed-signal,and I / O circuits for advanced SoCs
- Preferred Experience
- Industry experience in analog,mixed-signal,I / O,or custom IC design

Job Summary We are looking for an accomplished Analog and Mixed-Signal Design Engineer with relevant years of semiconductor design experience to develop high-performance, power-efficient analog, mixed-signal, and I/O circuits for advanced SoCs.

This is a highly technical role for an engineer who thrives on solving challenging circuit-design problems across advanced process nodes, high-speed interfaces, GPIO/I/O subsystems, power management, sensing, and mixed-signal integration . You will take designs from architecture and transistor-level implementation through verification, physical design, sign-off, and silicon bring-up, working closely with architecture, SoC, package, SI/PI, reliability, verification, and product engineering teams.

The Person

You are a strong circuit designer with deep understanding of CMOS Analog and Mixed-signal design , complemented by the ability to see the larger SoC and system context. You are comfortable making design trade-offs across performance, power, area, reliability, signal integrity, process variation, and time-to-market .

You combine hands-on transistor-level expertise with technical leadership and can independently drive complex designs, resolve ambiguous technical problems, and collaborate effectively across geographically distributed engineering teams.

Key Responsibilities

- Architect, design, and deliver advanced analog, mixed-signal, and I/O circuits for high-performance SoCs.




- Develop and optimize circuits such as GPIO/I/O interfaces, transmitters and receivers, level shifters, voltage detectors, clocking/support circuits, sensors, bias circuits, analog control circuits, and power-management interfaces .
- Perform detailed PVT, Monte Carlo, mismatch, noise, jitter, timing, power, and reliability analyses to ensure robust operation across manufacturing and operating conditions.
- Analyze I/O interfaces for signal integrity, power integrity, supply droop, ground bounce, termination, loading, and package/board interactions .
- Ensure designs meet appropriate ESD, EOS, electromigration, aging, TDDB, voltage-stress, and device-reliability requirements.
- Partner closely with layout engineers to drive matching, shielding, parasitic management, floorplanning, power routing, and analog layout quality.
- Collaborate with SoC architecture, RTL/DV, DFT, physical design, package, board, SI/PI, firmware, reliability, and product engineering teams to enable successful IP integration.
- Develop behavioral models and specifications that enable efficient mixed-signal and SoC-level verification .
- Support post-layout verification, design reviews, tape-out, silicon bring-up, characterization, debug, and production qualification .
- Identify design risks early and drive technically sound solutions through data-driven analysis.




- Contribute to circuit and design-methodology innovation and help drive next-generation IP architecture and reuse .
- Own circuit design from specification and architecture through schematic design, simulation, layout supervision, extraction, sign-off, and silicon characterization .
- Provide technical guidance and mentoring to engineers while raising the overall engineering quality of the team.

Preferred Experience

- Industry experience in analog, mixed-signal, I/O, or custom IC design.
- Robust transistor-level design fundamentals and extensive experience with CMOS circuit design and simulation .
- Proven experience delivering complex analog/mixed-signal or I/O IP to production silicon.
- Experience with advanced semiconductor process technologies and understanding of device scaling, process variation, reliability, and low-voltage design challenges .
- Strong knowledge in several of the following areas:
- GPIO and general-purpose I/O
- High-speed transmitter/receiver circuits
- Level shifters and multi-voltage-domain interfaces
- Analog/PVT/voltage/temperature monitoring
- Power and droop detection
- Clocking and timing circuits
- Bias and reference circuits
- Low-power analog techniques
- Signal and power integrity

- Hands-on experience with industry-standard schematic, simulation, layout, extraction, and sign-off flows , including SPICE-class circuit simulation.
- Solid understanding of PVT analysis, Monte Carlo analysis, mismatch, parasitics, timing, jitter, duty-cycle distortion, noise, and circuit stability .

Disclaimer: This job posting has been aggregated from external source. Role details, content, and availability are subject to change. Applicants are advised to confirm the latest information directly on the company website before applying.

📌 Lead Silicon Design Engineer (Hyderabad)
🏢 Advanced Micro Devices (AMD)
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