Job Summary

We are looking for an experienced ATE Test Engineer with hands-on expertise in Advantest and/or Teradyne ATE platforms for semiconductor product testing between 7 to 28 years in Bangalore and Chennai. The engineer will be responsible for ATE test program development, characterization, debugging, validation, and production test support across the silicon lifecycle.

Key Responsibilities

- Develop, debug, and maintain ATE test programs using Advantest V93000 and/or Teradyne UltraFLEX/J750 platforms.

- Perform silicon bring-up, characterization, validation, and production testing.

- Develop and optimize test flows for wafer sort/probe and final test.

- Perform DC, functional, digital, analog/mixed-signal, and parametric testing based on product requirements.

- Debug device, test program, test hardware, and tester-related failures.

- Analyze test results and manufacturing data to identify yield issues and failure patterns.

- Drive yield improvement, test coverage enhancement, and test-time optimization.

- Support development and debugging of load boards/device interface boards, probe cards, and other ATE hardware.

- Perform correlation activities across engineering and production test environments.

- Support test program release, qualification, and transfer to high-volume manufacturing.

- Troubleshoot production test issues and provide technical support to manufacturing/OSAT teams.

- Work closely with Product Engineering, Validation, Design, DFT, Hardware, and Manufacturing teams during silicon development and production.

- Create and maintain test specifications, test procedures, characterization reports, and technical documentation.

Skill Requirements

- Hands-on experience in ATE Test Program Development, Debugging, and Validation.





- Robust expertise in Advantest V93000 and/or Teradyne UltraFLEX / J750 platforms.

- Experience in Post-Silicon Validation, Silicon Bring-up, Characterization, and Production Testing.

- Knowledge of Wafer Sort/Probe, Final Test, and High-Volume Manufacturing (HVM) environments.

- Experience developing and debugging DC, Functional, Digital, Analog/Mixed-Signal, and Parametric tests, depending on device type.

- Strong knowledge of ATE test methodologies, test flows, test limits, and test coverage.

- Experience in Yield Analysis, Failure Analysis, and Yield Improvement.

- Hands-on exposure to Test Time Optimization and production test cost reduction techniques.

- Experience with Load Boards/DIBs, Probe Cards, and ATE test hardware.

- Ability to perform tester correlation, test program correlation, and production debug.

- Good understanding of semiconductor IC manufacturing and test flows.

- Programming/scripting knowledge in C/C++, Python, Perl, or relevant tester programming environments.

- Familiarity with interfaces/protocols such as I2C, SPI, UART, PCIe, USB, DDR, depending on product requirements.

- Good debugging, analytical, and problem-solving skills.

- Ability to collaborate with Product Engineering, Design, DFT, Validation, Characterization, and Manufacturing/OSAT teams.

Other Requirements

- Ability to analyze test logs, failure data, yield trends, and characterization results.

- Exposure to high-volume manufacturing (HVM) and working with OSAT/test manufacturing teams is preferred.

- Good knowledge of semiconductor quality, reliability, and production release processes.

- Ability to work effectively with cross-functional teams such as Design, DFT, Product Engineering, Validation, Test Hardware, and Manufacturing.

- Good technical documentation, communication, and stakeholder coordination skills.

📌 Senior Design Lead - Design Validation (India)
🏢 HCL Technologies
📍 India