RISCV Infra System IP DV - Sr Staff Engineer (Bengaluru)

RISCV Infra System IP DV - Sr Staff Engineer (Bengaluru)

26 Oct
|
Qualcomm
|
Bengaluru

26 Oct

Qualcomm

Bengaluru

Job Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Hardware Engineer, you will plan, design, optimize, verify, and test electronic systems, bring-up yield, circuits, mechanical systems, Digital/Analog/RF/optical systems, equipment and packaging, test systems, FPGA, and/or DSP systems that launch cutting-edge, world class products.

Qualcomm Hardware

Engineers collaborate with cross-functional teams to develop solutions and meet performance requirements.

Job Area

Engineering - IP Design Verification

Location: Bangalore

Educational Requirements

Bachelor/Masters Degree in Electronics Communication / Micro Electronics

Minimum Qualifications

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience. OR Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ years of Hardware Engineering or related work experience. OR PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.





Responsibilities

- 3 to 15 years of solid experience in IP/Sub System design verification
- Expertise on UVM, System Verilog DV test bench and other associated collaterals (Checkers, Trackers, Scoreboards, Assertion, Functional Coverage)
- Develop test plan and test cases to cover design feature set, follow up with stake holders on code coverage, functional coverage closure at different levels of test bench
- Work closely with System Architects, Design, emulation teams on failure debugs, code/functional coverage closure
- Debug of regression signatures and identifying bug fixes
- Understanding of bus protocols like CHI/AHB/AXI/ACE/ACE-Lite and Interconnect concepts
- Knowledgeable on ARM / RISCV system architecture, Memory Management, Virtual Memory concepts, Core sight architecture, power management fundamentals
- Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization
- Communication and collaboration skills to work with a large world-wide design organization
- Post-Silicon bring-up and HW-SW debug experience would be a plus
- Proficiency in Gen AI skills, Scripting languages (Python or Perl) for Automation initiatives is desirable

📌 RISCV Infra System IP DV - Sr Staff Engineer (Bengaluru)
🏢 Qualcomm
📍 Bengaluru

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