Post Silicon Validation -Sr/Lead/Staff Engineer (Hyderabad)

Post Silicon Validation -Sr/Lead/Staff Engineer (Hyderabad)

26 Oct
|
Qualcomm
|
Hyderabad

26 Oct

Qualcomm

Hyderabad

Company: Qualcomm India Private Limited

Job Area: Engineering Group, Engineering Group > ASICS Engineering

Job Summary

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all.

As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Qualcomm Validation and Integration team is a part of the Silicon Validation and Emulation Engineering Team and is responsible for the overall quality of Multimedia-IP in Silicon. As a member of our MMVI team, the candidate will develop suite of Multimedia/Imaging-cores, related drivers for bring-up, functional, performance, power, debug, manufacturing tests.

Candidate will be closely working with System-Architects, Designers, Verification, Firmware and Software engineers, participate in design-reviews to gather bring-up requirements, gather-info, interpret, develop low-level/bare-metal code (C/C++), provide the estimated scope of work and schedules, bring-up HW platforms, debug HW/SW issues.

We are currently seeking self-motivated Engineer who will perform device level and system level verification, validation, and debug, both in Emulation and in Post-Silicon.

Responsibilities

- Develop suite of Multimedia/Imaging-cores, related drivers for bring-up, functional, performance, power, debug, manufacturing tests.
- Work with System-Architects, Designers, Verification, Firmware and Software engineers,



participate in design-reviews to gather bring-up requirements, gather-info, interpret, develop low-level/bare-metal code (C/C++), provide the estimated scope of work and schedules, bring-up HW platforms, debug HW/SW issues.
- Perform device level and system level verification, validation, and debug, both in Emulation and in Post-Silicon.

Requirements

- 6+ years Systems/Debug/Integration Engineering or related work experience.
- 6+ year of experience with C, C++, Python, Java, Shell-scripting, Version-Control Tools, RTOS
- 6+ years of experience using in-circuit emulation/debug tools
- Experience with Multimedia / Peripheral (USB/URAT/UFS/PCIE) / ARM Core / any IP validation.
- Familiarity with High-Speed interfaces Signal Integrity
- Embedded SW/drivers development of low-level HW interfaces in C/ASM. Device test and script, automation development (Python preferred), test-plan development.
- Good EE fundamentals, initiative, taking ownership and responsibilities, critical thinking
- Strong written, verbal, interpersonal, presentation communication skills

Experience Areas

- 6+ yrs of Embedded SW development related experience (C/C++/OOP/Java, Python, Shell, RTOS)
- ARM-based System-On-Chip Emulation debug validation experience related to board bring-up and low-level software and hardware issues debug; familiarity with ARM Coresight IP, compilers, linkers, scatter-files are desirable




- Experience in test-validation debug of (MIPI-based) High-Speed interfaces, signal-integrity issues and Camera/Video Imaging concepts
- Experience in digital integrated circuit or core design, digital IC architecture, and complete ASIC lifecycle development
- Experience with Machine Learning (TensorFlow, PyTorch), Deep Learning, Neural Networks
- Experience in a lab environment using standard test-equipment (Scopes, Logic-Analyzers, etc.)
- Understanding of JTAG debugging, Lauterbach Trace32 workplace scripting
- Understanding of low power design concepts, performance and thermal processes
- Some knowledge of Verilog/System Verilog, FPGA design is a plus
- Familiarity with DFT/DFD ATE/ATPG is a plus
- Familiarity with RMA process

Qualifications

- Bachelor's degree in Electronics and Comm Engineering, Computer Science, Electrical Engineering, or related field and 6+ years of Hardware Engineering, Systems Engineering, Software Engineering, or related work experience
- Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience
- Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience
- PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
- Master's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
- PhD in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience

📌 Post Silicon Validation -Sr/Lead/Staff Engineer (Hyderabad)
🏢 Qualcomm
📍 Hyderabad

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